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RDM Data direction GPIO's

Logic level '0' = INPUT, '1' = OUTPUT
GD32F103RC GD32F107RC GD32F207RG GD32F303RC GD32F407RE GD32F450VI GD32F207C_EVAL BW_OPIDMX4 DMX4
USART0 N.A. N.A. N.A. N.A. N.A. N.A. N.A. (2) GPIOA PIN5 GPIOA PIN4
USART2 GPIOB PIN10 GPIOB PIN10 GPIOB PIN10 GPIOB PIN10 GPIOB PIN10 N.A. (1) N.A. (2) GPIOB PIN10 GPIOB PIN10
UART4 N.A. N.A. N.A. N.A. N.A. N.A. N.A. (2) GPIOA PIN4 GPIOA PIN5
USART5 N.A. N.A. GPIOA PIN11 N.A. GPIOA PIN11 N.A. (1) N.A. (2) GPIOA PIN11 GPIOB PIN14

The above is defined in the files:

(1) There is DMX output only.
(2) User defined.

U(S)ART DMA Channel's

MCU Family Channnel 0 Channnel 1 Channnel 2 Channnel 3 Channnel 4 Channnel 5 Channnel 6 Channnel 7
GD32F10x DMA 0 USART2_TX USART0_TX USART1_TX
DMA 1 UART3_TX
GD32F20x DMA 0 USART2_TX USART0_TX USART1_TX
DMA 1 UART4_TX
UART7_TX
UART3_TX
UART6_TX
USART5_TX
GD32F303 DMA 0 USART2_TX USART0_TX USART1_TX
DMA 1 UART3_TX
GD32F4xx DMA 0 UART7_TX UART6_TX USART2_TX UART3_TX USART1_TX UART4_TX
DMA 1 USART5_TX USART0_TX

GPIO REMAP

USART0 REMAP=0 F:AF7 REMAP=1 F:AF7
TX PA9 PB6
RX PA10 PB7
USART1 REMAP=0 REMAP=1
TX PA2 PD5
RX PA3 PD6
USART2 REMAP=00 F:AF7 REMAP=01 F:AF7 REMAP=11 F:AF7
TX PB10 PC10 PD8
RX PB11 PC11 PD9
UART3 REMAP=0 F:AF8 REMAP=1 F:AF8
TX PC10 PA0
RX PC11 PA1
REMAP=00 (no remap), REMAP=01 (partial remap), REMAP=11 (full remap)
UART4 REMAP=0 F:AF8
TX PC12
RX PD2
USART5 REMAP=0 F:AF8 REMAP=1 F:AF8
TX PC6 PG14
RX PC7 PG9
UART6 REMAP=0 F:AF8 REMAP=1 F:AF8
TX PE8 PF7
RX PE9 PF6
UART7 NO REMAP F:AF8
TX PE1
RX PE0

The above is defined in the files:

Timers used

Timer Description
1 Transmit USART0, USART1, USART2 and UART3
4 Transmit UART4, USART5, UART6 and UART7
2 Receive Slot time-out Port 0,1,2,3
3 Receive Slot time-out Port 4,5,6,7
6 Receive 1 second interrupt